10/100 Ethernet PHY Reference Design

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10/100 Ethernet PHY

Discrete 10/100 PHY

Discrete 10/100 PHY in† a 100 pin QFP package

Mike led the development of TIís first 10/100 Ethernet PHY in a 3.3V digital CMOS process. One of the key design challenges was to realize the analog functions using only N-Well resistors. Mike designed both PLLs; precision wave-shaping transmitter with PLL rise-time control for both 10BASE-T and 100BASE-TX; 10BASE-T receiver, reference and oscillator circuits, and the second generation 100BASE-TX receiver with adaptive equalization and baseline-wander correction. The TNETE2101 10/100 PHY was publicly available in volume for over five years.